1. Field of the Invention
The present invention relates to a method of fabricating an integrated circuit, and more particularly to a method of fabricating a bit line.
2. Description of the Related Art
The cost of the integration circuit process is usually high. Reducing the use of masks can reduce the number of process steps, and thus makes fabrication of the integrated circuit more economical.
For example, the conventional process for fabricating bit line contacts and bit lines requires many steps. The first step is to form a dielectric layer over the substrate. Then, the dielectric layer is covered with a patterned photoresist layer that is applied to define the dielectric layer. An etching process is performed to form a bit line contact opening in the dielectric layer, using the photoresist layer as mask. The bit line contact opening is filled with a conducting layer to form a bit line contact. Next, the substrate is covered with another conducting layer that is applied to form a bit line. The other patterned photoresist layer is formed on the second conducting layer to define the second conducting layer. The second conducting layer is etched to form the bit line.
Since at least two masks are needed to fabricate bit line contacts and bit lines in the prior art integration circuit process, the process window is limited and the cost is burdensome.